1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and, more particularly, to a semiconductor integrated circuit device comprising a high-speed, low-voltage operating MISFET.
2. Description of the Related Art
Recently, the widespread use and the increased functionality of portable information apparatuses such as portable telephones and portable PDAs (Personal Digital Assistants) have been driving the need to further increase the operating speed and reduce the power consumption of semiconductor integrated circuit devices constructed from MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors, or more broadly, MISFETs (Metal-Insulator-Semiconductor FETs)).
Conventionally, to reduce the power consumption of CMOS (Complementary MOS) circuits, it has been practiced to reduce the driving power supply voltage. However, as the reduced supply voltage results in a lower operating speed, if the power consumption is to be reduced without compromising the operating speed, the threshold voltage of the MOS transistors has had to be reduced. Reducing the threshold voltage of the MOS transistors leads to faster switching operation of the MOS circuit, but this in turn results in an increase in subthreshold leakage current, and hence an increase in power consumption.
In view of this, a technique that applies a forward bias voltage as a well voltage (body voltage or back-gate voltage) to a MOS transistor has been attracting attention in recent years. However, application of a forward bias voltage to the well (body) involves other problems such as an increase in chip area due to the addition of a bias voltage generating circuit. There is therefore a need to provide a semiconductor integrated circuit device having a body biasing circuit that can generate a forward body (well) bias voltage of a suitable level by using simple circuitry.
The prior art and its associated problem will be described in detail later with reference to relevant drawings.